An Area‐Efficient 2.45 GHz CMOS 180 nm Power Amplifier With Mono‐Passive‐Inductor and Active Inductor Driver for IoT Applications

This paper presents an area‐efficient CMOS mono‐passive‐inductor power amplifier (MPI‐PA) with integrated active inductor driver stage. The proposed design eliminates the requirement for large‐area planar inductors conventionally utilized in matching networks by introducing a cascode‐configured active inductor as an RF choke in the driver stage. The active inductor employs a gyrator‐C structure with extended frequency range, allowing for high inductive impedance at desired frequency of 2.45 GHz, while occupying minimal on‐chip area. Only a single planar inductor is utilized in the main power stage of the PA to cater for the high output power and efficiency. Measurement results show that the active inductor achieves an inductance of 3.28 nH and a quality factor of 1.92 at 2.45 GHz, with a self‐resonant frequency at 5.0 GHz. Fabricated in a 180 nm CMOS process, the MPI‐PA delivers a maximum output power of 20.8 dBm with a peak power added efficiency (PAE) of 31.8% as well as gain of 17.5 dB. The total active area is only 0.4761 mm 2 , making it well suited for area‐constrained and cost‐effective RF front‐end applications in Internet‐of‐Things (IoT) applications.