A high-speed logic delay of 3.0 ps/gate in a resistor-coupled Josephson logic (RCL) gate chain is attained using a new Nb Josephson integrated circuit technology. Lift-off, Nb stress control and planarisation techniques are used for fabricating high-quality Nb/AlOx/Nb trilayer junctions and reliable Nb wiring. Pd, which is stable during etching, is used as a resistor material.
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Kuroda et al. (1987) studied this question.