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• The energy harvesting chip integrates thermoelectric (THE) and photovoltaic energy (PEH) harvesters. • The post-process of the energy harvesting chip is fully compatible with commercial CMOS technology. • The PEH design improves p-n junctions, boosting conversion efficiency. • The voltage and power factors for the TEH are 8.9 mV/(mm 2 ·K) and 1.3 nW/(mm 2 ·K 2 ), respectively. • The PEH achieves a maximum output power of 106 µW under 1000 W/m 2 irradiance. This study explores the development of an energy harvesting chip (EHC) using a complementary metal oxide semiconductor (CMOS) process, addressing the need for efficient micro-scale energy harvesters in modern electronics. The EHC integrates a thermoelectric energy harvester (TEH) and a photovoltaic energy harvester (PEH) to maximize energy conversion efficiency. A key challenge in TEH design is enhancing power output, which is addressed by suspending the cold ends of 41 thermocouples within the TEH structure through post-processing. Experimental methods were employed to assess the performance of the TEH, revealing an output voltage of 21.4 mV and a maximum output power of 9.32 nW under a 3 K temperature difference. The TEH demonstrated a voltage factor of 8.9 mV/(mm 2 ·K) and a power factor of 1.3 nW/(mm 2 ·K 2 ). The PEH was designed with novel patterned p-n junctions, integrating lightly doped n-type regions with interdigitated p-type doping to increase junction density, resulting in high conversion efficiency. The experimental results confirm the effectiveness of the EHC design, showcasing its potential in energy harvesting applications.
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Dai et al. (2024) studied this question.
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