Experimental radiation testing reveals high multiple cell upset rates in 25-nm multilevel flash memories, highlighting altered error mechanisms as technology scales.
We analyzed floating-gate upsets in 25-nm multilevel cell NAND Flash memories irradiated with heavy ions, including alpha particles. Compared to multilevel cell memories of previous generations, these devices show no apparent error dependence on the program level, adherence to the cosine law, and a large number of multiple cell upsets (MCUs). Floating-gate errors were mapped to their physical location, and MCUs were studied as a function of their multiplicity, direction, particle linear energy transfer, irradiation angle, and program level.
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Bagatin et al. (2013) studied this question.
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