40 nm-thick Pt/(Al0.9Sc0.1)N/Pt ferroelectric capacitor stacks for logic-embedded memory on 300 mm Si with wafer-scale uniformity and process stability

Thirty-nanometer-thick (Al 0.9 Sc 0.1 )N films were deposited on 5 nm-thick Pt bottom electrodes on 300 mm-diameter Si wafers, and the wafer-scale uniformity of the film properties was evaluated. The films exhibited a thickness uniformity of 0.6% (1σ), a surface roughness uniformity of 3.3% (1σ), and a Sc/(Al + Sc) ratio uniformity of 1.4% (1σ). The degree of crystal orientation, evaluated from the full width at half maximum ( FWHM ) value of the X-ray diffraction (XRD) (002) rocking curve, showed a wafer-scale uniformity of 1.3% (1σ). A 5 nm-thick Pt top electrode was deposited to form a total 40 nm-thick Pt/(Al 0.9 Sc 0.1 )N/Pt capacitor stack, which showed, as measured by positive-up-negative-down (PUND), a remanent polarization ( P r ) value of >100 μC cm −2 and a coercive field ( E c ) value with a wafer-scale uniformity of 1.9% (1σ) across the wafer. Retention at 85 °C showed <~10% P r loss up to 10 5 s. To assess process reproducibility, process stability over a 500-wafer run was evaluated. Wafer-to-wafer variations were 1.0% (1σ) in thickness, 2.5% (1σ) in surface roughness, 0.9% (1σ) in the Sc/(Al + Sc) ratio, 3.5% (1σ) in the FWHM value of the XRD (002) rocking curve, 3.1% (1σ) in the P r value, and 1.0% (1σ) in the E c value, confirming stable film quality and crystal orientation during continuous deposition over the 500-wafer run. This work presents a wafer-scale evaluation of a 40 nm-total-thickness Pt/(Al 0.9 Sc 0.1 )N/Pt capacitor stack on 300 mm-diameter Si wafers. The present results demonstrate that (Al 0.9 Sc 0.1 )N films achieve the uniformity and stability required for high-volume manufacturing, enabling process integration for logic-embedded ferroelectric memory applications.