A W-Band LNA/Phase Shifter With 5-dB NF and 24-mW Power Consumption in 32-nm CMOS SOI

This paper presents a W-band phased array receive front end in 32-nm CMOS silicon-on-insulator technology. The architecture is based on cascode low-noise amplifiers and passive switched LC 5-bit phase-shifters and with root-mean-square (rms) phase error of1dBof -25 dBm. The low-noise amplifier and phase-shifter front end consumes 24.3 mW including bias circuits. To the author's knowledge, the front-end NF and power consumption are state of the art for silicon-based phased array receivers at W-band frequencies, and compares well with indium phosphide (InP) and gallium arsenide (GaAs) pseudomorphic high electron mobility transistor front ends.