Design of a 30-GHz Frequency Tripler to Suppress the Fundamental Spurious Tone

A design for a 30-GHz frequency multiplier using a Samsung 28-nm fully depleted silicon-on-insulator process is presented. The basic topology of the tripler is a single balanced mixer, which up-converts the fundamental LO signal and the second harmonic tone from a push–push doubler to achieve the third harmonic tone. The method suggested controls the phase of the down-converted signal and the fundamental tone from LO feedthrough to cancel each other. Additional fundamental spur suppression of 9.4 dB was achieved by applying 90° phase-shifted signals to the input of the push–push doubler, without additional fine tuning. The measurement shows that this tripler has a 3-dB bandwidth of 3.8 GHz, fundamental tone rejection of 29 dBc, and second harmonic rejection of 27 dBc. This amplifier consumes 21 mW of DC power from a 1 V supply voltage.