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The depth dependent carrier density was measured on an arsenic implanted silicon sample using scanning capacitance microscopy (SCM). The capacitance versus voltage scan was performed by applying dc biases with a dither ac signal. A strong dc bias dependence was observed at the interface of an abrupt junction between n+ and p. The bias dependent SCM images show good agreement with quasi-three dimensional simulations, suggesting that they can be used to map a device structure.
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Kang et al. (1997) studied this question.
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