The Pt/SBT/ZrO 2 /Si structure was proposed for metal–ferroelectric-insulator–semiconductor field-effect-transistor applications. A SrBi 2.4 Ta 2 O 9 (SBT) thin film was prepared using liquid source misted chemical deposition (LSMCD) on a Si substrate with ZrO 2 buffer layer deposited by reactive sputtering. The LSMCD-derived SBT film exhibited 2 P r of 16.6 µC/cm 2 and E c of 25 kV/cm at ±5 V. Interdiffusion between SBT and Si was suppressed with a ZrO 2 layer thicker than 20 nm. The memory window of the Pt/SBT (400 nm)/ZrO 2 /Si with 20–50 nm ZrO 2 became larger with increasing the gate voltage and decreasing ZrO 2 thickness. The Pt/SBT (400 nm)/ZrO 2 (20 nm)/Si exhibited memory windows of 0.83 V at ±5 V and 1.26 V at ±7 V.
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Park et al. (2002) studied this question.
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