This brief analyzes the performance of a new type of analog-to-digital converters (ADCs) architecture. The approach contemplates stretching the analog signal in time prior to digitization. Its benefits include an increase in the effective sampling rate and the input bandwidth, and a reduction in the sampling-jitter noise of the digitizer. It builds on the recent demonstration of high-speed analog-to-digital (A/D) conversion where a photonic preprocessor was used to successfully stretch an analog electrical signal before electronic digitization. The brief considers parallel time stretch ADC arrays capable of processing continuous time signals. In particular the effects of interchannel offset and gain mismatch, and clock skew are described and are contrasted with those in a conventional time-interleaved system. A mode of operation unique to this system is outlined wherein interchannel mismatch errors are entirely avoided at the expense of resolution bandwidth.
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Asuri et al. (2002) studied this question.
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