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April 1, 1985IEEE Transactions on Electron Devices

Self-aligned gate GaAs IC with 4.0-GHz clock frequency

R.E. Lee H.M. Levy R. P. Bryan

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Abstract

This paper reports fabrication of high-speed GaAs divider IC's implemented using self-aligned gate (SAG) technology. BFL circuits employing SAG D-MESFET's have operated at higher clock speed (4.0 GHz) and have achieved higher yield (> 80 percent) than circuits with comparable threshold voltage and gate-length fabricated using "selective implant" or "recessed gate" technology.

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Cite This Study

Lee et al. (1985) studied this question.

synapsesocial.com/papers/6a893da3e0083a7c2c431e05 https://doi.org/10.1109/t-ed.1985.22034

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