Pb(Zr, Ti)O3(PZT)/MgO/Si(001) stacked structures, one of the potential components of ferroelectric-gate field effect trnsistors, have been fabricated and characterized. According to the electrical characterization of MgO/Si structures, MgO thin films prepared on Si substrates at a low growth rate showed a small leakage current of ∼10-8 A/cm2 order in an electric field of 1 MV/cm. In C-V measurements of as-grown MgO/Si interfaces, injection-type hysteresis was observed because of crystal defects in the MgO film adjacent to the interface. After oxygen annealing at 400°C, however, it showed no hysteresis and a low interface trap density of the order of 1011 cm-2eV-1 was achieved with no formation of a low-dielectric layer at the MgO/Si interface. These results indicate that MgO thin films are applicable as gate insulators of FETs. After a PZT film was deposited on the MgO/Si structure, the C-V characteristic of the stacked structure showed a ferroelectric hysteresis curve and a low interface trap density of 5×1011 cm-2eV-1. A maximum memory window width of 1.2 V was obtained for the PZT thin film on Si substrate with a MgO intermediate layer.
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Senzaki et al. (1998) studied this question.
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