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April 1, 2006IEEE Journal of Solid-State Circuits

A 512-Mb DDR3 SDRAM Prototype With CIO Minimization and Self-Calibration Techniques

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Authors

CPC. ParkHCHenry Shu-Hung ChungCity University of Hong KongYLYoung‐Seak LeeChungnam National University

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Park et al. (2006) studied this question.

synapsesocial.com/papers/6a8c2e9729efb9ec64c46acchttps://doi.org/10.1109/jssc.2006.870808
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