Dependence of dislocations on emitter phosphorus diffusion conditions and their effects on electrical characteristics of silicon planar NPN transistors

It is shown that emitter edge dislocations (EED) need not be “distinct from and in addition to diffusion-induced dislocations (DID)” as generally accepted. Namely, under certain emitter diffusion conditions, when DID just began to appear, EED and DID can become the same dislocations, originally created inside diffused emitter areas, and then, during emitter oxidation step, displaced towards edges of these areas. Also, it is shown that conventional method for EED elimination, although it considerably reduces a low-frequency noise of planar NPN transistors, has undesirable effects on the other electrical characteristics: increases reverse emitter-base current at voltages below avalanche breakdown, i.e. causes “soft” breakdown and reduces commonemitter current gain at low current level.