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Experimental evaluation demonstrates reduced switch count and 7.28% distortion in an 11-level inverter across inductive loads, suggesting improved efficiency for power conversion.
This work presents a single-phase cascaded H-bridge 11-level multilevel (11L-MLI) inverter with a reduced number of components to achieve a reasonable low total harmonic distortion (THD). The design includes a snubber circuit that enhances performance across a wide range of inductive loads, eliminating the need to specify different load categories. The inverter configuration consists of 8 switches, 4 diodes, and 5 symmetrical DC sources. Despite achieving a THD of 7.28%, the key strengths of the proposed design are a significant reduction in component count, simplified control structure, and the ability to manage voltage spikes effectively with the snubber circuit. This performance is demonstrated under a load of Z=250Ω+450 mH, where lower-order harmonics are eliminated using selective harmonic elimination (SHE). Furthermore, the performance of the proposed MLI has been validated for different inductive loads in simulations. Although state-of-the-art designs can achieve THD values as low as 3%, the proposed MLI offers a practical balance between component reduction and performance, particularly in voltage spike management. The proposed topology is simulated in Altair PSIM software and experimentally verified for its performance in managing voltage spikes and reducing harmonic distortion.
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Arya et al. (2026) studied this question.
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