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The effect of different gate oxide processes on the performance of 4H-SiC MOSFETs has been studied. These processes include different gate oxide depositions (high-temperature oxide, low-temperature oxide, and plasma-enhanced chemical vapor deposition oxide) and annealing processes (oxygen, NO, andCO₂). Various MOS device parameters, particularly, threshold voltage, subthreshold slope, field-effect electron mobility, sheet electron carrier concentration, and Hall mobility, are correlated with various process steps.
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Wang et al. (2008) studied this question.
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