Proximity effect correction for high-voltage electron beam lithography

A new proximity effect correction method using an approximate dose correction formula has been developed. The method is especially effective for a high acceleration voltage. In the case of an acceleration voltage of 40 kV, the correction error for the energy deposition in the resist was estimated analytically to be less than ±7%. The deviations of the line and space pattern dimensions were also evaluated experimentally to be less than ±0.03 μm. The calculation time for correcting a 4-Mbit dynamic random access memory (DRAM) was only 0.7 h using a large-scale computer of 15 MIPS (mega instructions per second). Even if the LSI patterns have no hierarchical structure, in an application specific integrated circuit (ASIC) pattern the calculation time would be 1 h or so. A 4-Mbit DRAM pattern can be written using the electron beam direct-writing system EX-7 with sufficient accuracy. These results suggest that the method is practical.