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A technique is described which uses conventional photolithography in fabricating metal–oxide–metal diodes with submicrometer-square junction areas. The junction is formed at the edge of the first thin-film electrode, thereby reducing one dimension of the junction by an order of magnitude or more over linewidths obtainable by standard photolithographic methods. Although the technique is applied specifically to the fabrication of a metal–oxide–metal diode array, it is generally applicable to other thin-film devices requiring submicrometer-square junction areas.
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Robert Havemann (1978) studied this question.
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