Reverse Nested Miller Compensation Using Current Buffers in a Three-Stage LDO

A novel frequency compensation scheme called reverse nested Miller compensation using current buffers (RNMCCB) for three-stage amplifiers is proposed. As opposed to previous reverse nested schemes, our work uses inverting gain stages for both the second and third stages. The outer compensation loop utilizes a current mirror as an inverting current buffer (CB), and the inner loop uses a common-gate amplifier as a CB, creating two left-half-plane (LHP) zeros. We introduce a simple and effective method of placing a resistor in series with a CB for accurate placement of LHP zeros. As a design example of the RNMCCB scheme, we propose a three-stage low dropout voltage regulator (LDO) in a 0.5-¿m CMOS process to supply 1.21 V to a load ranging from 1 ¿A to 100 mA. Our design goals were to simultaneously achieve very high current efficiency and very low transient output voltage variation. As such, we achieved a 99.95% current efficiency and a maximum load transient output voltage variation of ±48 mV with an output capacitor of 100 nF. Experimental results, in good agreement with theoretical analysis, validate the novel RNMCCB frequency compensation scheme.