Sidewall damage in a silicon substrate caused by trench etching

The sidewall damage in a silicon substrate caused by trench etching has been investigated using deep level transient spectroscopy. In order to detect surface and near-surface modifications resulting from trench etching, a special device structure consisting of an n+/p junction array is used. It is found that three kinds of deep level are introduced onto the sidewall. The energy levels of these traps are Ec − 0.30 eV, Ev + 0.60 eV, and Ev + 0.66 eV, respectively. The deep level at Ev + 0.60 eV acts as a G-R center. The reverse current characteristics of the same device have three modes with activation energies of 0.59, 0.64, and 0.13 eV, respectively. These modes also result from the sidewall damage. It is found that a transformation of the sidewall damage occurs at 1000 °C. The G-R center and two of the reverse current modes disappear, but the damage is not completely annealed out because the others still remain.