The role of leakge current on the memory window and memory retention in MFIS structure

Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure has been fabricated with Strontium Bismuth Tantalate (SBT) ferroelectric and Yttrium oxide as the buffer layer between ferroelectric and silicon. Capacitance versus voltage (C-V) analysis shows that memory window is found to be dependent on charge injection and charge retention in MFIS structure. Analysis of current versus voltage (I-V) characteristics show that the memory window and retention is strongly dependent on the leakage current in the MFIS structure.