Reduction of electron and hole trapping in SiO2 by rapid thermal annealing

Reduction of electron or hole trapping in SiO2 was achieved by short-time lamp annealing. The trapping characterization was done by the avalanche injection technique on metal-oxide-silicon capacitor structures with aluminum gates and SiO2 thickness of 50 nm. Electron trapping on water related centers is reduced by 10-s anneals in Ar or N2 ambients at 600–800 °C. Hole trapping is reduced by short anneals in an O2 ambient at 1000 °C with an optimal time of 100 s. The O2 short anneal is much more effective if the oxide had a long post-oxidation anneal in N2 at 1000 °C which produces an interfacial nitrogen-rich layer at the Si-SiO2 interface.