The effects of radiation exposure on the performance of CMOS integrated circuits are difficult to predict and to simulate due to the bias-dependent device parameter shifts. Simulation methodologies for identification of failure mechanisms and performance estimation are developed. These simulation algorithms are implemented in the PARA simulator for switch-level simulation of radiation effects. Simulation results for test circuits are presented that prove that accurate estimations are possible without CPU-intensive simulation programs.>
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Bhuva et al. (1989) studied this question.
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