This paper discusses issues concerning single-event burnout (SEB) and single-event gate rupture (SEGR); explains and provides a basic overview of the preferred test conditions and procedures that would yield the most meaningful test results in evaluating power MOSFETs' SEB susceptibilities, describes how to correctly identify SEB and SEGR failure modes to derive the most feasible failure mechanisms.
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Liu et al. (2008) studied this question.
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