A novel power MOSFET structure fabricated using sacrificial spacer technology is described. Anisotropically etched sidewall oxide spacers were used to implement self-aligned shallow p/sup +/ surface diffused regions to reduce the p-base sheet resistance and its contact resistance. Vertical power DMOSFETs with V/sub DB/=150 V and R/sub sp/=9.7 m Omega -cm/sup 2/ were fabricated using this technology, where V/sub DB/ is the drain-source avalanche breakdown voltage and R/sub sp/ is the specific on-state resistance. The measured on-state resistance performance is a factor of 4 times smaller compared to commercially available power MOSFETs in the 150-V reverse blocking range.>
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K. Shenai (1992) studied this question.
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