The authors describe a 40 Gbit/s fully monolithic clock recovery integrated circuit (IC) fabricated using 0.1 µm InAlAs/InGaAs/InP HEMTs. The IC utilises injection locking, and consists of a half bit delay, an exclusive OR gate and a T-type flip-flop. The IC extracts a half-rate clock signal from a 39.81312 Gbit/s 231 – 1 pseudo-random bit sequence signal without any other external components.
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Murata et al. (2000) studied this question.
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