A novel clock recovery circuit for fully monolithic integration

This paper presents a novel clock recovery circuit that offers fully monolithic integration. The circuit consists of just the transistor gates of an exclusive OR for an edge-detector and a free-running T-type flip-flop for a high-Q oscillator. As the first proof of the concept, we assemble a circuit using discrete integrated circuits and confirm half-rate clock extraction from an nonreturn to zero data stream input. In order to examine feasibility of the circuit in practical use, we assemble a clock and data recovery circuit. The circuit exhibits stable operation with the bit-error rate of less than 1/spl times/10/sup -12/.