Tradeoffs and electron temperature calculations in lightly doped drain structures

Physical explanations are presented for why lightly doped drain (LDD) structures may be both good, in that they reduce parasitic gate currents; and bad, in that they lead to a decrease, of transconductance with time. The former effect is related to the reduction peak electric fields by the LDD profile, and the exponential dependence of gate currents on these fields; the latter effect may be related to the filling of a fixed density of available states over a larger fraction of the channel in the LDD device, resulting in a decrease in channel conductance. A physically based method for calculating electron temperatures in MOSFET channels, and ways of using this method for assessing the tradeoffs involved in LDD design, are also presented.