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The influence of the architecture on analog-to-digital converter modeling is investigated for the three most widespread architectures: integrating, successive approximations, and flash. The effects of main error sources are analyzed in terms of integral and differential nonlinearity with the aim of setting up a unified error model. Such a model is useful both to economically generate a look-up table for error correction and to quickly produce diagnosis models for fault detection and isolation. Numerical simulations aimed to show the model effectiveness and experimental tests carried out to validate the model are discussed.
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Arpaïa et al. (1999) studied this question.
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