An 8-bit 100-MHz full-Nyquist analog-to-digital (A/D) converter using a folding and interpolation architecture is presented. In a folding system a multiple use of comparator stages is implemented. A reduction in the number of comparators, equal to the number of times the signal is folded, is obtained. However, every quantization level requires a folding stage, thus no reduction in input circuitry is found. Interpolation between the outputs of the folding stages generates additional folding signals without the need for input stages. A reduction in input circuitry equal to the number of interpolations is obtained. The converter is implemented in an oxide-isolated bipolar process, requiring 800 mW from a single 5.2-V supply. A high-level model describing distortion caused by timing errors is presented. Considering clock timing accuracies needed to obtain the speed requirement, this distortion is thought to be the main speed limitation.>
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Plassche et al. (1988) studied this question.
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