Utilizing on-chip radiation for communication with power control in next-generation IoT devices

Analog radio-frequency (RF) front-ends and physical antennas remain major contributors to the size, weight, and power (SWaP) constraints of Internet-of-Things (IoT) edge devices. To circumvent these limitations, we investigate a Proof-of-Concept (PoC) wireless communication architecture that repurposes on-chip clock routing into a reduced overhead telemetry link. Eliminating dedicated RF front-end circuitry and physical antennas, the PoC system exploits unintentional electromagnetic (EM) emanations from Field Programmable Gate Array (FPGA) General-Purpose Input/Output (GPIO) pins to establish stable on-off keying (OOK) modulation. Operating entirely within the FPGA fabric, this design achieves programmable carrier generation over representative frequencies spanning 6.25 MHz to 900 MHz at an effective dynamic power budget of 40 to 100 mW. We formalize and experimentally validate two power-control mechanisms—carrier duty-cycle manipulation and auxiliary clock modulation—enabling digitally controlled transmission scaling exceeding 20 dB without analog RF amplification circuitry. Empirical propagation modeling and hardware evaluations confirm the architecture’s robustness across diverse physical environments. By supporting data ratesup to 1 Mega bits-per-secs and achieving a 164 meters maximum transmission range under a -70 dBm noise floor, this work demonstrates the PoC of a viable, energy-efficient alternative for physical-layer communication in constrained IoT networks.