Experimental study demonstrates reduced radiation degradation in V-Gate analog front ends under ionizing radiation, highlighting superior bias stability for harsh environments.
This study experimentally compares the total ionizing dose (TID) responses of conventional and V-Gate regulated cascode transimpedance amplifier (RGC TIA)-based analog front ends (AFEs) fabricated in a 180 nm, 3.3 V CMOS process. Both AFEs were integrated on a single ASIC, and the V-Gate layout was applied to all NMOS devices in the hardened AFE. The powered circuits were driven with repetitive pulses and irradiated at 3.432 kGy/h to 13.73 kGy. At the final dose, pulse amplitude and slew rate decreased by 3.48% and 9.11% in the conventional AFE but by only 0.63% and 1.73% in the V-Gate AFE, corresponding to degradation reductions of approximately 82% and 81%, respectively. The IB_TP-derived bias current increased by 18.8% in the conventional AFE and 0.73% in the V-Gate AFE, while the input and output DC voltages remained stable. Leakage current sensitivity analysis identified the RGC TIA and bias generator as the main contributors to DC-level and pulse amplitude changes, whereas the Class-AB buffer and bias generator more strongly affected slew rate. A combined simulation reproduced the pulse amplitude reduction with a small DC shift. The results show that the V-Gate layout preserves the pulse response and bias stability of RGC TIA-based AFEs under TID irradiation.
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Ki et al. (2026) studied this question.
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