Presented is a fully-integrated 2.45/3.8 GHz concurrent dual-band CMOS power amplifier (PA) with a switchless matching network. The area of the PA is 1.46×0.7 mm2, and it is fabricated in a 0.18 µm RF CMOS process. It uses a supply voltage of 3.3 V. The measured maximum output power and drain efficiency of the dual-band PA are 23.4 dBm and 42% at 2.45 GHz and 24.5 dBm and 39% at 3.8 GHz, respectively.
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Yoon et al. (2011) studied this question.
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