Existence of optimum cold FET intrinsic reference plane for active FET small signal modeling

Cold FET methods have been widely used for active FET modeling assuming the bias independence of parasitic elements. However, the assumption has been merely justified by the resulting modeling accuracy. This paper investigates the consistency of cold FET conditions with active FET through the exact and the error minimizing solutions of cold FET intrinsic reference plane constrained by the feedback condition of active FET model. Additionally, drain bias dependence of parasitic resistances will be presented.