Solid-State-Diffusion Bonding for Wafer-Level Fine-Pitch Cu/Sn/Cu Interconnect in 3-D Integration

Low-temperature Cu/Sn/Cu solid-state-diffusion (SSD) bonding has been investigated in this paper. Twenty-micrometer fine-pitch bumps with daisy-chain and Kelvin structures were fabricated by high-efficiency and low-cost electroplating process. Before bonding, the bump surface was treated with Ar(5% H2) plasma. Wafer-level bonding was performed with a pressure of 6.7 MPa at 200 °C for 60 min. Microstructure of the as-bonded interface consisted of five layers, i.e., Cu/Cu3Sn/Cu6Sn5/Cu3Sn/Cu, no Sn overflow was observed, and pure Sn was completely consumed during bonding process. After annealing at 200 °C for 60 min under N2atmosphere, Cu6Sn5was exhausted, and the average shear strength increased to 11.4 MPa. The resistance measurements were approximate to the theoretical estimation. The bonded performance had no significant change after thermal cycling test. The bonding interface exhibited an expected antielectromigration capability. It is concluded that Cu/Sn/Cu SSD bonding would be one of the potential technologies for 3-D integration.