A CMOS Operational Amplifier With Continuous‐Time Offset‐Compensation Using Quasi‐Infinite Resistors

A continuous‐time offset‐compensation architecture for CMOS operational amplifiers based on quasi‐infinite resistors and an ultra‐low‐frequency analog feedback loop is presented. Unlike conventional autozero and chopper‐stabilized techniques, the proposed architecture eliminates switches, modulation signals, and high‐gain auxiliary amplifiers within the compensation loop, thereby avoiding switching‐induced nonidealities while preserving the bandwidth of the main signal path. A complete analytical formulation describing the frequency response, offset‐cancellation mechanism, and ultra‐low‐frequency compensation loop is developed and validated through HSPICE simulations and experimental measurements obtained from a prototype fabricated in ON Semiconductor m CMOS technology. The analytical model shows that variations of the equivalent QIR resistance primarily affect the long‐term adaptation dynamics while producing negligible influence on the frequency response of the main amplifier, a conclusion further supported by Monte Carlo, temperature‐dependent, frequency‐response, and transient simulations. Experimental measurements performed on four fabricated prototypes demonstrate an average equivalent input‐referred offset of V for a closed‐loop gain of 1000 V/V. Simulations predict a DC gain of 135 dB, a unity‐gain bandwidth of 1.7 MHz, a phase margin of , and an input‐referred integrated noise of V over a 100 Hz bandwidth. The fabricated prototype occupies an active circuit area of only while dissipating . These results demonstrate that the proposed architecture constitutes a competitive continuous‐time alternative to switching‐based offset‐compensation techniques for continuously powered precision analog interfaces, achieving an attractive compromise among offset, bandwidth, power consumption, active circuit area, implementation simplicity, and robustness.