Two‐dimensional (2D) p‐type WSe 2 has remarkable potential to resolve the intrinsic performance mismatch between p‐type and n‐type materials for next‐generation integrated electronics. However, a scalable chemical vapor deposition (CVD) strategy for wafer‐scale, layer‐tunable, high‐quality p‐type WSe 2 is still lacking. Here, we realize 2‐inch monolayer and bilayer WSe 2 via Al 2 O 3 interface passivation engineering. By investigating the Al 2 O 3 interfacial structure variations of Se‐terminated and Al‐terminated sapphire, we found that Se‐passivated Al 2 O 3 achieves superior lattice matching and strong interfacial coupling with WSe 2 , enabling alkaline‐etching‐dependent separation. In contrast, Al‐passivated WSe 2 facilitates efficient water‐assisted PMMA transfer of WSe 2 owing to weak interfacial interaction with sapphire. Top‐gate transistors reveal Se‐passivated WSe 2 is intrinsically p‐type, while Al‐passivated WSe 2 displays n‐type due to ALD‐doping. The electrical performance of bilayer WSe 2 outperforms monolayers, with excellent uniformity. Back‐gate transistors of Al‐passivated WSe 2 present tunable ambipolar transport with switchable n/p‐type conduction. Pristine bilayer WSe 2 exhibits a hole mobility of 13.73 cm 2 V −1 s −1 , while ALD‐doped WSe 2 realized an electron mobility up to 60.17 cm 2 V −1 s −1 . Moreover, WSe 2 /MoS 2 complementary inverters exhibit reliable switching behavior. This study develops a feasible approach to grow wafer‐scale WSe 2 , offering a reliable material preparation scheme for large‐scale fabrication of 2D‐based logic devices.
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Lü et al. (2026) studied this question.
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