The gate oxide lifetime limited by `B-mode' stress induced leakage current and the scaling limit of silicon dioxides in the direct tunnelling regime

This is the authors' abstract. We don't add key points for this paper.

The scaling limit of the silicon dioxides as gate dielectrics is discussed from the viewpoint of the oxide lifetime. First, the definition of the `oxide lifetime' in the direct tunnelling regime has been studied, even though various studies report that soft breakdown (SBD) induces device failure. It is revealed that the previous studies overestimated the leakage current after the SBD, i.e. the `B-mode' stress induced leakage current (B-mode SILC), and that the SBD stressed under typical device-operating conditions never prevents the transistors from working well. Although hard breakdown is expected to limit the oxide lifetime consequently, a new concept of oxide lifetime limited by the chip-level off-leakage current, i.e. the statistical effect of the B-mode SILC, has been proposed. The study on the stress voltage dependence of oxide lifetimes limited by these two factors demonstrates that the oxide lifetime under typical device-operating conditions is limited by the B-mode SILC. Based on this concept, it has been clarified that the oxide lifetime as a reliability issue does not limit the scaling down of silicon dioxides as the gate dielectrics in future devices.