Answers are grounded in this paper and cite their sources.
Although /spl Delta//spl Sigma/ modulators are widely used for low to moderate rate analog-to-digital conversion, the time oversampling requirement has discouraged their application to higher rate converters. This paper presents an architecture wherein multiple /spl Delta//spl Sigma/ modulators are combined so that neither time oversampling nor time interlacing are necessary. Instead, the system achieves the effect of oversampling from the multiplicity of modulators. For a system containing M P/sup th/-order /spl Delta//spl Sigma/ modulators, approximately P bits of accuracy are gained for every doubling of M. A major benefit of the architecture is that it retains much of the robustness of the individual /spl Delta//spl Sigma/ modulators to nonideal circuit behavior. As a result, the architecture offers the potential of integrating high-precision, high-speed A/D converters together with digital signal processing functions using VLSI processes optimized for digital circuitry. The paper presents the general architecture and provides a performance analysis closely supported by computer simulations.
No takes yet. Share an insight, caveat, or question.
Galton et al. (1995) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: