52–75 GHz wideband low-noise amplifier in 90 nm CMOS technology

A three-stage single-ended low-noise amplifier covering almost the entire V-band is presented. The design employs three cascade single-ended stages with pi-sections for wideband interstage matching and source degeneration at the first stage. The amplifier achieves a peak gain of 14 dB and minimum noise figure of 4.8 dB. A record 3 dB bandwidth of 37% is achieved with power consumption of 32 mW and core silicon area of 0.065 mm2 in 90 nm CMOS technology.