Study on 20 V LDMOS With Stepped-Gate-Oxide Structure for PMIC Applications: Design, Fabrication, and Characterization

In this brief, a 20 V laterally diffused metal-oxide-semiconductor (LDMOS) device with the concept of stepped-gate-oxide (SGO) was fabricated with standard0.15 ~μ mBCD technology. Compared with the conventional shallow-trench-isolation LDMOS (STI-LDMOS), the SGO structure features a straight conduction path on a silicon surface, based on our past development experience, and therefore, an ON-resistance reduction of about 20% can be obtained. This brief demonstrated the LDMOS from a power-switching perspective, considering both optimization design and characterization aspects. The optimum device was demonstrated withR ON,spof 4.92mΩ ·mm2, breakdown voltage (BV) of 23.8 V, and device figure of merit (FOM) of 20mΩ-nC. By combining with optimum power stage design, the buck converter efficiency showed 93.88% at low load condition and 93.98% at high load condition, achieving an outstanding dc–dc converting performance.