Cost-Effective Design and Optimization of a 3300-V Semi-Superjunction 4H-SiC MOSFET Device

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This study investigates a cost-effective semi-Superjunction (SSJ) solution for 3.3 kV silicon carbide (SiC) MOSFETs, comparing planar and trench configurations. The semi-SJ method, utilizing side-wall implantation and silicon oxide trench refill, offers a practical alternative to the more complex multi-epitaxial growth approach. Through TCAD simulations, the planar semi-SJ MOSFET (planar-SSJ) achieved a 48 % reduction in specific on-state resistance (7.5 mΩ.cm2) and a 4.5 % improvement in maximum blocking voltage (4210 V) compared to conventional planar MOSFET. The trench semi-SJ MOSFET (trench-SSJ), depending on the deep trench angle, can further reduce the specific on-state resistance by 52 % (7.0 mΩ.cm2) and improve the maximum blocking voltage by 6 % (4285 V), while also providing a wider implantation window and a lower gate-oxide electric field.