Low-Temperature SLID-TSV Interconnects for 3-D (MEMS) Packaging

This is the authors' abstract. We don't add key points for this paper.

3D heterogeneous integration is becoming increasingly important in advanced packaging as device functionalities expand within smaller spaces. 3D interconnects such as Through Silicon Vias (TSVs)- Solid-Liquid Inter-Diffusion (SLID) interconnects offer a promising approach for achieving miniaturization, high integration, and reduced power consumption. However, well known Cu-Sn SLID-TSVs require high bonding temperatures, leading to residual stress and cracks. This research focuses on developing 3D interconnects by using Cu-Sn-In/Co SLID-TSVs, which decrease bonding temperatures and reduce these issues. Finite element simulations qualitatively compared stress state in both SLID-TSV systems, showing lower residual stress in the Cu-Sn-In/Co SLID system than in Cu-Sn SLID. The Cu-Sn-In/Co SLID-TSV underwent microstructural analysis and reliability tests, including high-temperature storage (HTS), thermal shock (TS), and tensile strength testing. Most samples were free of voids and cracks, with a few showing minor defects along the bond-line after thermal shock. No cracks were observed inside the Si and TSVs. This indicates that adopting the Cu-Sn-In/Co system and reducing the bonding temperature to 200°C can effectively prevent crack formations across bondlines, Si, and TSVs. Furthermore, all the samples meet the tensile strength requirements according to MIL-STD-883 method 2027.2, with the highest value observed for HTS-tested samples. Hence, low-temperature 3D SLID-TSV interconnects were successfully demonstrated, showing strong potential for 3D MEMS-ICs.