Sub-50-nm In0.7Ga0.3As MOSFETs With Various Barrier Layer Materials

Sub-50-nm In0.7Ga0.3As MOSFETs with high-k dielectric Al2O3have been demonstrated and investigated. The device performance of buried-channel In0.7Ga0.3As MOSFETs with various barrier layer materials (i.e., InP and InAlAs) has been analyzed and compared to that of devices without a barrier layer. The 40-nm-gate-length In0.7Ga0.3As MOSFETs with InP/InAlAs barrier exhibit a subthreshold swing of 130 mV/dec, a drain-induced barrier lowering of 174 mV/V, and an extrinsic transconductance of 570 mS/mm at Vds= 1 V. Scaling behaviors of buried-channel In0.7Ga0.3As MOSFETs with and without a barrier layer material have also been analyzed.