The relentless scaling of semiconductor technology necessitates transformative solutions for power delivery networks (PDNs). Backside PDNs have emerged as a promising approach by decoupling power and signal interconnects. However, the integration of key components like buried power rails (BPRs) and nano-through-silicon vias (nTSVs) faces significant challenges, including interfacial instability and stringent alignment requirements. This work introduces a robust integration strategy utilizing Ruthenium (Ru) as the fill material for both BPRs and nTSVs, leveraging its superior chemical stability. An in-situ co-integration scheme is demonstrated, featuring a self-aligned etching process that enables the precise formation of nTSVs directly onto the BPRs, eliminating critical overlay constraints. An atomic layer deposition process achieves simultaneous, void-free, and conformal Ru metallization without a separate diffusion barrier. Furthermore, an innovative ion-beam thinning-back process is successfully implemented for the precise recess of Ru, overcoming the polishing challenges associated with this hard metal. Electrical characterization reveals an excellent and consistent line resistance of 11.4-11.8 Ω/μm for the co-integrated interconnects. The electromigration performance is rigorously assessed, and a comprehensive multiphysics model is established, showing strong agreement between experimental and simulated failure times, thereby validating its predictive accuracy. This work provides a holistic solution that paves the way for high-performance and highly reliable backside PDNs in advanced 3D integrated circuits (ICs).
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Huang et al. (2026) studied this question.
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