Implementation of New AZSPWM Algorithm for Indirect Matrix Converter-Fed Induction Motor Drives with Lower CMV

Pulse-width modulation (PWM) is used to generate switching signals for power converters that provide high-quality output voltages. This technique must also contend with common-mode voltage (CMV), which has become a major concern in PWM-fed drives. A novel active zero-state PWM technique (AZSPWM) algorithm is presented in this work to reduce the CMV and overall switching in induction motor (IM) drives. The AZSPWM approach uses the zero-sequence voltage to increase the phase voltages to create modulating signals that also reduce harmonic distortion. When two active voltage vectors with the same duty cycle are in opposition to each other and two nearby voltage vectors are canceled, an effective zero state is created in AZSPWM. By doing away with the need for switching from one sector to the next, the AZSPWM algorithm minimizes the overall number of switches when compared to previous methods. The low modulation index range of operation is appropriate for the AZSPWM. Overvoltages may arise from AZSPWM’s short durations of zero voltage between line-to-line voltage pulse reversals, particularly when long cables are utilized for motor drives. Experimental studies on IM drive have been conducted to assess the suggested method, and the results are reported.