A systematic time-based approach for analysis and compensation of excess loop delay in continuous-time sigma-delta modulators exceeding one clock cycle

In this paper, we propose a new time-domain method for calculating the coefficients in continuous-time sigma-delta modulators (CT Σ∆Ms) in the presence of excess loop delay (ELD). Additionally, we present a two-step method to compensate for the effect of dynamic element matching (DEM) in multibit digital-to-analog converters (DACs). Our method intuitively investigates the loop-filter outputs and yields systematic equations suitable for computer aided design (CAD) softwares. The equations are easily applicable to modulators with an arbitrary feedback pulse shape at each stage and can be extended to higher-order modulators. The generality and flexibility of these equations enable their use for altering the modulator's feedback pulse shape and recalculating modulator coefficients. Furthermore, we extended our approach for ELD compensation in modulators utilizing the DEM block for feedback DAC linearization, allowing for DEM block delays exceeding one clock cycle. Simulation results validate the accuracy of the analytical calculations.