FPGA-Embedded Data Converters for Mixed-Signal Reconfigurable Detector Instrumentation

Particle physics experiments rely on complex trigger and data acquisition systems, where large channel counts, low latency, compact implementation, and power efficiency are critical requirements. In this context, mixed-signal interfaces are often needed in front-end electronics for signal digitization, monitoring, calibration, and local data processing. Conventional analog data converters, however, may limit scalability when many channels must be integrated in systems based on field-programmable gate arrays (FPGAs) or digital application-specific integrated circuits (ASICs). This work presents synthesizable digital-to-analog converter (DAC) and analog-to-digital converter (ADC) architectures, implemented using fabric FPGA resources. The DAC is based on a digitally controlled delay line and generates a 400 MHz pulse-width-modulated output that can be filtered to obtain a continuous analog voltage. The ADC follows a single-slope architecture for voltage-to-time conversion, and a tapped delay line for time-to-digital conversion at 400 MSps. Both architectures were implemented and experimentally characterized in an AMD Kintex UltraScale+ FPGA. The DAC achieves a 2.3 V dynamic range, an LSB of approximately 5 mV, and an ENOB of 3.9 bit at 500 kHz, full-scale range. The ADC provides a 1.5 V dynamic range, 9-bit output, non-linearity within 1% over the full range, and 6.2 ENOB at 1 MHz, full-scale range. The combined (ADC + DAC) implementation uses less than 2% of a XCKU5P FPGA fabric resources. Our results demonstrate the suitability of the proposed approach for compact, scalable mixed-signal interfaces in experimental physics instrumentation, paving the way for implementation in application-specific integrated circuits.