High-Level Synthesis (HLS) design productivity is often constrained by manual, expert-driven pragma tuning and the difficulty of balancing performance optimization with strict hardware resource limits. While automated Design Space Exploration (DSE) has been extensively studied, many existing approaches rely on open-loop estimation models or substantial training data, which can lead to physically unrealizable designs under tight resource budgets. In this work, we propose Reflex-HLS , a training-free agentic framework that formulates HLS optimization as a closed-loop, feedback-driven process grounded in physical synthesis outcomes. Reflex-HLS integrates Large Language Models (LLMs) within a Planner–Actor–Critic architecture, where optimization decisions are iteratively refined based on hardware-in-the-loop feedback from the vendor toolchain, ensuring physical realizability throughout the optimization process. Experimental results on PolyBench and MachSuite benchmarks, validated through full Vivado synthesis and implementation, demonstrate that Reflex-HLS achieves speedups of up to 48.41 × (e.g., on jacobi-2d ) while strictly adhering to device resource constraints. Further evaluations across regular, irregular, and structured workloads show that the proposed framework generalizes beyond conventional compute kernels. Comparative studies against representative open-loop DSE methods, large foundation models operating without hardware feedback, and closed-loop heuristic search highlight the trade-offs among optimization paradigms, with Reflex-HLS producing more deployable and resource-efficient designs under tight resource budgets in the evaluated cases.
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Chen et al. (2026) studied this question.
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