Inverse-designed subwavelength metamaterial 3×3 reconfigurable power distributor for high-density programmable photonic computing

Silicon photonic integrated circuits underpin high-speed photonic computing and optical communication systems. Conventional on-chip optical switches are inherently limited to two output ports, imposing a fundamental ceiling on computational density and architectural scalability under fixed chip footprints, while bulky weight-tuning units further hinder integration miniaturization. Here we report a synergistic phase and optical field manipulation strategy for dynamic on-chip power redistribution enabled by inverse-designed subwavelength silicon metamaterials. We experimentally realize a 3×3 reconfigurable power distributor with an ultra-compact 4×1.9 μm² footprint, achieving continuous power tuning of 0.3%–78.6%, 0.3%–91.8% and 1.6%–72.1% across three output channels. Serving as a compact optical classifier primitive, it yields 88.67% five-fold accuracy on 150 Iris samples via a calibrated hardware-response model, and on-chip measurements of the fabricated device validate class-selective optical routing on an independent 30-sample test set. Extending the architecture to four ports, direct finite-difference time-domain simulations yield 97.0% accuracy (388/400 images) for four-class handwritten digit recognition. These results establish reconfigurable multi-port silicon photonics as compact building blocks for high-density programmable photonic computing.